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INTEGRATED CIRCUITS
DATA SHEET
TEA6300 TEA6300T Sound fader control circuit
Product specification File under Integrated Circuits, IC01 May 1990
Philips Semiconductors
Product specification
Sound fader control circuit
GENERAL DESCRIPTION The Sound Fader Control circuit (SOFAC) is an I2C-bus controlled preamplifier for car radios. Features * Source selector for three stereo inputs * Inputs and outputs for noise reduction circuits * Volume and balance control; control range of 86 dB in steps of 2 dB * Bass and treble control from + 15 dB (treble 12 dB) to -12 dB in steps of 3 dB * Fader control from 0 dB to -30 dB in steps of 2 dB * Fast muting * Low noise suitable for DOLBY* B and C NR (noise reduction) * Signal handling suitable for compact disc * I2C-bus control for all functions * ESD protected QUICK REFERENCE DATA SYMBOL VCC Vi(rms) Vi(rms) fr CS THD (S+N)/N Tamb Supply voltage Input sensitivity for full power at the output stage Input signal handling Frequency response Channel separation; f = 250 Hz to 10 kHz Total harmonic distortion Signal plus noise-to-noise ratio Operating ambient temperature range PARAMETER 7,0 - - 35 70 - - -40 MIN. 50 1,65 - 92 0,05 80 - TYP. 8,5 - -
TEA6300 TEA6300T
MAX. 13,2 V
UNIT mV V Hz dB % dB C
20 000 - - - + 85
* Dolby is a registered trademark of Dolby Laboratories Licensing Corporation, San Francisco, California (U.S.A.). PACKAGE OUTLINES 28-lead dual in-line; plastic (SOT117); SOT117-1; 1996 August 15. 28-lead mini-pack; plastic (SO28; SOT136A); SOT136-1; 1996 August 15.
May 1990
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Sound fader control circuit TEA6300 TEA6300T
Philips Semiconductors
Product specification
Sound fader control circuit
PINNING 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 SDA QLR QLF TL BL1 BL0 INLA i.c. INLB ELFI INLC QSL INL INR QSR INRC GND INRB Vref INRA BRO BR1 TR QRF QRR VCC SCL serial data input/output (I2C-bus) output left rear output left front treble control capacitor; left channel bass control capacitor; left channel bass control capacitor; left channel input left source A internally connected input left source B electronic filtering for supply input left source C output source selector left input left control part input right control part output source selector right input right source C ground input right source B reference voltage (1/2 VCC) input right source A bass control capacitor; right channel bass control capacitor; right channel treble control capacitor; right channel output right front output right rear supply voltage serial clock input (I2 C-bus) GNDB ground for I2C-bus terminals
TEA6300 TEA6300T
Fig.2 Pinning diagram.
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Philips Semiconductors
Product specification
Sound fader control circuit
FUNCTIONAL DESCRIPTION
TEA6300 TEA6300T
The source selector selects three stereo channels -RF part (AM/FM), recorder and compact disc. As the outputs of the source selector and the inputs of the main control part are available, additional circuits such as compander and equalizer systems may be inserted into the signal path. The AC signal setting is performed by resistor chains in combination with multi-input operational amplifiers. The advantage of this principle is the combination of low noise, low distortion and a high dynamic range for the circuit. The separate volume controls of the left and the right channel facilitate correct balance control. The range and balance control is software programmable. Because the TEA6300 has four outputs a low-level fader is included. The fader control is independent of the volume control and an extra mute position is built in for the front, the rear or for all channels. The last function may be used for muting during preset selection. An extra pop suppression circuit is built in for pop-free switching on and off. As all switching and control functions are controllable via the two-wire I2C-bus, no external interface between the microcomputer and the TEA6300 is required. The on-chip power-on-reset sets the TEA6300 to the general mute mode. RATINGS Limiting values in accordance with the Absolute Maximum System (IEC 134) SYMBOL VCC Ptot Tstg Tamb PARAMETER Supply voltage (pin 27-18) Maximum power dissipation Storage temperature range Operating ambient temperature range - - -55 -40 MIN. 16 1 +150 + 85 MAX. V W C C UNIT
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Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300 TEA6300T
CHARACTERISTICS VCC = 8,5 V; RS = 600 ; RL = 10 k; f = 1 kHz; Tamb = 25 C; test circuit Fig.10; unless otherwise specified SYMBOL VCC ICC ICC ICC VDC VREF Gv Vo(rms) Vo(rms) Vi(rms) Supply voltage Supply current Supply current at 8,5 V Supply current at 13,2 V DC voltage inputs, outputs and reference Internal reference voltage (pin 20) Vref = 0,5 VCC Maximum voltage gain bass and treble linear, fader off Output voltage level for Pmax at the output stage for start of clipping Input sensitivity at Vo = 500 mV Frequency response bass and treble linear; roll-off fr frequency -1 dB Channel separation Gv = 0 dB; bass and treble linear; CS frequency range 250 Hz to 10 kHz Total harmonic distortion frequency range 20 Hz to 12,5 kHz THD THD THD Vi = 50 mV; Gv = 20 dB Vi = 500 mV; Gv = Vi = 1,6 V; Ripple rejection Vr(rms) < 200 mV; Gv = 0 dB; bass and treble linear; RR100 RRrange at f = 100 Hz at f = 40 Hz to 12,5 kHz - - 70 60 - - dB dB 0 dB Gv = -10 dB - - - 0,1 0,05 0,2 0,3 0,2 0,5 % % % 70 92 - dB 35 - 20 000 Hz - 50 - mV - - 500 1000 - - mV mV 19 20 21 dB - 4,25 - V 0,45 0,5 0,55 VCC PARAMETER - - - MIN. 7,0 TYP. 8,5 26 - - - 33 44 MAX. 13,2 V mA mA mA UNIT
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Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300 TEA6300T
PARAMETER MIN. TYP. MAX. UNIT
SYMBOL
Signal plus noise-to-noise ratio bass and treble linear; notes 1 and 2 CCIR 468-2 weighted; quasi peak (S + N)/N (S + N)/N (S + N)/N (S + N)/N (S + N)/N (S + N)/N Vi = 50 mV; Vo = 46 mV; Po = 50 mW Vi = 500 mV; Vo = 45 mV; Po = 50 mW Vi = 50 mV; Vo = 200 mV; Po = 1 W Vi = 500 mV; Vo = 200 mV; Po = 1 W Vi = 50 mV; Vo = 500 mV; Po = 6 W Vi = 500 mV; Vo = 500 mV; Po = 6 W Noise output power mute position, only contribution of Pno TEA6300; power amplifier for 25 W Crosstalk (20 log Vbus(p-p)/Vo(rms)) between bus inputs and signal outputs B Source selector Zi Zo RL CL Input impedance Output impedance Output load resistance Output load capacity Input isolation not selected source; frequency range S Gv Vb int/Vref Vi(rms) Vi(rms) THD Vno Vo 40 Hz to 12,5 kHz Voltage gain RL 10 k Internal bias voltage ratio Maximum input voltage level (RMS value) THD < 0,5% THD < 0,5%; VCC = 7,5 V Total harmonic distortion Vi = 500 mV; RL = 10 k Noise output voltage weighted CCIR 468-2, quasi peak DC offset voltage between any inputs - - 10 mV - 9 20 V - - 0,1 % - - 1,65 1,5 - - V V - - 0 1 - - dB - 80 - dB 20 - 10 0 30 - - - 40 100 - 200 k k pF GV = 0 dB; bass and treble linear - 110 - dB - - 10 nW - - 65 65 - - 65 67 70 78 70 85 - - - - - - dB dB dB dB dB dB
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Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300 TEA6300T
PARAMETER MIN. TYP. MAX. UNIT
SYMBOL Control part
Source selector disconnected, source resistance 600 Zi Zo RL CL Input impedance Output impedance Output load resistance Output load capacity Maximum input voltage THD < 0,5%; Gv = -10 dB; Vi(rms) bass and treble linear Noise output voltage weighted acc CCIR 468-2, quasi-peak, bass and treble linear, fader off Vno Vno Vno Vno Volume control Gc Continuous control range Step resolution Attenuator set error Ga Ga (Gv = + 20 to -50 dB) Attenuator set error (Gv = + 20 to -66 dB) Gain tracking error balance in mid position, Gt m DC step offset Between any adjoining step and any step to mute Gv = 0 to -66 dB Gv = 20 to 0 dB In any treble and fader position Gv = 0 to -66 dB In any bass position Gv = 0 to -66 dB - - 20 mV - - 10 mV - - 0,2 2 10 15 mV mV bass and treble linear Mute attenuation - 72 - 90 2 - dB dB - - 3 dB - - 2 dB - - 86 2 - - dB dB Gv = 20 dB Gv = 0 dB Gv = -66 dB mute position - - - - 110 25 19 11 220 50 38 22 V V V V - 2,0 - V 35 - 5 0 50 100 - - 65 150 - 2500 k k pF
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Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300 TEA6300T
PARAMETER MIN. TYP. MAX. UNIT
SYMBOL Bass control
Bass control range Gb Gb f = 40 Hz; maximum boost f = 40 Hz; maximum attenuation Step resolution Step error Treble control Treble control range Gt Gt Gt f = 15 kHz; maximum boost f = 15 kHz; maximum attenuation f > 15 kHz; maximum boost Step resolution Step error Fader control Continuous attenuation Gf fader control range Step resolution Attenuator set error m Digital part Mute attenuation - - - 74 30 2 - 84 - - 1,5 - dB dB dB dB 11 11 - - - 12 12 - 3 - 13 13 15 - 0,5 dB dB dB dB dB 14 11 - - 15 12 3 - 16 13 - 0,5 dB dB dB dB
Bus terminals
Input voltage VIH VIL IIH IIL VOL HIGH LOW Input current HIGH LOW Output voltage LOW; IL = 3 mA In accordance with the I2C-bus specification -10 -10 - - - - +10 +10 0,4 A A V 3 -0,3 - - 12 + 1,5 V V
AC characteristics Power-on-Reset
When RESET is active the GMU (general mute) bit is set and the I2C-bus receiver is in RESET position Increasing supply voltage VCC VCC VCC start of reset end of reset Decreasing supply voltage; start of reset - 5,2 4,2 - 6,0 5,0 2,5 6,8 5,8 V V V
Notes to the characteristics 1. The indicated values for output power assume a 6 W power amplifier with 20 dB gain, connected to the output of the
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Philips Semiconductors
Product specification
Sound fader control circuit
circuit. Signal-to-noise ratios exclude noise contribution of the power amplifier.
TEA6300 TEA6300T
2. Signal-to-noise ratios on a CCIR 468-2 average meter reading are 4,5 dB better than on CCIR 468-2 quasi peak. I2C-BUS FORMAT S SLAVE ADDRESS A SUBADDRESS A DATA A P
S SLAVE ADDRESS A
= = =
start condition 1000 0000 acknowledge, generated by the slave
SUBADDRESS DATA P
= = =
see Table 1 see Table 1 STOP condition
If more than 1 byte of DATA is transmitted, then auto-increment of the subaddress is performed. Table 1 I2C-bus; subaddress/data DATA FUNCTION volume left volume right bass treble fader switch SUBADDRESS D7 00000000 00000001 00000010 00000011 00000100 00000101 X X X X X GMU X X X X X X D6 D5 VL5 VR5 X X MFN X D4 VL4 VR4 X X FCH X D3 VL3 VR3 BA3 TR3 FA3 X D2 VL2 VR2 BA2 TR2 FA2 SCC D1 VL1 VR1 BA1 TR1 FA1 SCB D0 VL0 VR0 BA0 TR0 FA0 SCA
Function of the bits: VL0 to VL5 VR0 to VR5 BA0 to BA3 TR0 to TR3 FA0 to FA3 FCH MFN SCA to SCC GMU X volume control left volume control right bass control treble control fader control select fader channel (front or rear) mute control of the selected fader channel (front or rear) source selector control mute control (general mute) for the outputs QLF, QLR, QRF and QRR don't care bits (logic 1 during testing)
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Philips Semiconductors
Product specification
Sound fader control circuit
Table 2 GV DB +15 +15 +15 +15 +12 +9 +6 +3 0 -3 -6 -9 -12 -12 -12 -12 BA3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 Bass setting DATA BA2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 BA1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 BA0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 +12 +9 +6 +3 0 -3 -6 -9 -12 -12 -12 -12 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 0 0 0 0 Table 3 GV DB +12 +12 +12 +12 TR3 1 1 1 1 Treble setting DATA TR2 1 1 1 1
TEA6300 TEA6300T
TR1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0
TR0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
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Philips Semiconductors
Product specification
Sound fader control circuit
Table 4 GV DB 20 18 16 14 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 VL5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VL4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 Volume setting LEFT DATA VL3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 VL2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 VL1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 VL0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 -30 -32 -34 -36 -38 -40 -42 -44 -46 -48 -50 -52 -54 -56 -58 -60 -62 -64 -66 mute left mute left . . . mute left 0 0 0 GV DB VL5 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VL4 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 DATA VL3 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 . . .
TEA6300 TEA6300T
VL2 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0
VL1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
VL0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
0
0
0
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Philips Semiconductors
Product specification
Sound fader control circuit
Table 5 GV DB 20 18 16 14 12 10 8 6 4 2 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 VR5 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 VR4 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 Volume setting RIGHT DATA VR3 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 VR2 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 VR1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 VR0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 . . . mute right 0 0 0 -30 -32 -34 -36 -38 -40 -42 -44 -46 -48 -50 -52 -54 -56 -58 -60 -62 -64 -66 mute right mute right GV DB VR5 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 VR4 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 DATA VR3 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 0 0 0 0 0 0 . . .
TEA6300 TEA6300T
VR2 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 1 1 1 0 0
VR1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 1
VR0 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0
0
0
0
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Philips Semiconductors
Product specification
Sound fader control circuit
Table 6 Fader function DATA SETTING FRONT REAR MFN 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 FCH FA3 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 . . . 0 1 0 0 0 0 FA2 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1 FA1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1 FA0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0 DB 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 . . . 0 Table 8 DATA SELECTED INPUTS SCC data not allowed data not allowed data not allowed INLC, INRC data not allowed INLB, INRB INLA, INRA data not allowed May 1990 1 1 1 1 0 0 0 0 SCB 1 1 0 0 1 1 0 0 SCA 1 0 1 0 1 0 1 0 14 passive 0 CONTROL active GMU 1 DB 0 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -30 -80 . . . -80 0 0 0 MFN 1 0 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 0 FCH FA3 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 1 1 1 1 1 1 1 1 1 0 0 0 0 0 0 0 0 1 . . .
TEA6300 TEA6300T
SETTING FRONT REAR DB 0 0 -2 -4 -6 -8 -10 -12 -14 -16 -18 -20 -22 -24 -26 -28 -30 -80 . . . -80 Table 7 DB 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 . . . 0
DATA
FA2 1 1 1 1 1 0 0 0 0 1 1 1 1 0 0 0 0 1
FA1 1 1 1 0 0 1 1 0 0 1 1 0 0 1 1 0 0 1
FA0 1 1 0 1 0 1 0 1 0 1 0 1 0 1 0 1 0 0
fader off
fader off
fader front
fader rear
mute front
mute rear
0
0
0
Selected inputs
Mute control DATA REMARKS outputs QLF, QLR QRF and QRR are muted no general mute
MUTE
Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300 TEA6300T
Fig.3 Bass control without T-pass filter.
Fig.4 Bass control with T-pass filter.
Pin numbers in parentheses refer to the bass control, right channel.
Fig.5 T-pass filter.
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Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300 TEA6300T
Fig.6 Treble control.
Fig.7 Output noise voltage (CCIR 468-2 weighted: quasi peak).
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Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300 TEA6300T
Fig.8
Signal-to-noise ratio (CCIT 468-2 weighted; quasi peak) with a 6 W power amplifier (gain 20 dB) without noise contribution of the power amplifier (see Fig.9).
Fig.9 Recommended level diagram; Vi min = 50 mV, Vo = 500 mV for Pmax.
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Philips Semiconductors
Product specification
Sound fader control circuit
APPLICATION INFORMATION
TEA6300 TEA6300T
Fig.10 Test and application circuit.
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Philips Semiconductors
Product specification
Sound fader control circuit
PACKAGE OUTLINES
handbook, plastic dual in-line package; 28 leads (600 mil) DIP28: full pagewidth
TEA6300 TEA6300T
SOT117-1
seating plane
D
ME
A2
A
L
A1 c Z e b1 b 28 15 MH wM (e 1)
pin 1 index E
1
14
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 5.1 0.20 A1 min. 0.51 0.020 A2 max. 4.0 0.16 b 1.7 1.3 0.066 0.051 b1 0.53 0.38 0.020 0.014 c 0.32 0.23 0.013 0.009 D (1) 36.0 35.0 1.41 1.34 E (1) 14.1 13.7 0.56 0.54 e 2.54 0.10 e1 15.24 0.60 L 3.9 3.4 0.15 0.13 ME 15.80 15.24 0.62 0.60 MH 17.15 15.90 0.68 0.63 w 0.25 0.01 Z (1) max. 1.7 0.067
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT117-1 REFERENCES IEC 051G05 JEDEC MO-015AH EIAJ EUROPEAN PROJECTION
ISSUE DATE 92-11-17 95-01-14
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Philips Semiconductors
Product specification
Sound fader control circuit
TEA6300 TEA6300T
SO28: plastic small outline package; 28 leads; body width 7.5 mm
SOT136-1
D
E
A X
c y HE vMA
Z 28 15
Q A2 A1 pin 1 index Lp L 1 e bp 14 wM detail X (A 3) A
0
5 scale
10 mm
DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT mm inches A max. 2.65 0.10 A1 0.30 0.10 A2 2.45 2.25 A3 0.25 0.01 bp 0.49 0.36 c 0.32 0.23 D (1) 18.1 17.7 0.71 0.69 E (1) 7.6 7.4 0.30 0.29 e 1.27 HE 10.65 10.00 L 1.4 Lp 1.1 0.4 Q 1.1 1.0 0.043 0.039 v 0.25 0.01 w 0.25 0.01 y 0.1 Z
(1)
0.9 0.4
0.012 0.096 0.004 0.089
0.019 0.013 0.014 0.009
0.419 0.043 0.050 0.055 0.394 0.016
0.035 0.004 0.016
8 0o
o
Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT136-1 REFERENCES IEC 075E06 JEDEC MS-013AE EIAJ EUROPEAN PROJECTION
ISSUE DATE 95-01-24 97-05-22
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Philips Semiconductors
Product specification
Sound fader control circuit
SOLDERING Introduction There is no soldering method that is ideal for all IC packages. Wave soldering is often preferred when through-hole and surface mounted components are mixed on one printed-circuit board. However, wave soldering is not always suitable for surface mounted ICs, or for printed-circuits with high population densities. In these situations reflow soldering is often used. This text gives a very brief insight to a complex technology. A more in-depth account of soldering ICs can be found in our "IC Package Databook" (order code 9398 652 90011). DIP SOLDERING BY DIPPING OR BY WAVE The maximum permissible temperature of the solder is 260 C; solder at this temperature must not be in contact with the joint for more than 5 seconds. The total contact time of successive solder waves must not exceed 5 seconds. The device may be mounted up to the seating plane, but the temperature of the plastic body must not exceed the specified maximum storage temperature (Tstg max). If the printed-circuit board has been pre-heated, forced cooling may be necessary immediately after soldering to keep the temperature within the permissible limit. REPAIRING SOLDERED JOINTS Apply a low voltage soldering iron (less than 24 V) to the lead(s) of the package, below the seating plane or not more than 2 mm above it. If the temperature of the soldering iron bit is less than 300 C it may remain in contact for up to 10 seconds. If the bit temperature is between 300 and 400 C, contact may be up to 5 seconds. SO REFLOW SOLDERING Reflow soldering techniques are suitable for all SO packages. Reflow soldering requires solder paste (a suspension of fine solder particles, flux and binding agent) to be applied to the printed-circuit board by screen printing, stencilling or pressure-syringe dispensing before package placement.
TEA6300 TEA6300T
Several techniques exist for reflowing; for example, thermal conduction by heated belt. Dwell times vary between 50 and 300 seconds depending on heating method. Typical reflow temperatures range from 215 to 250 C. Preheating is necessary to dry the paste and evaporate the binding agent. Preheating duration: 45 minutes at 45 C. WAVE SOLDERING Wave soldering techniques can be used for all SO packages if the following conditions are observed: * A double-wave (a turbulent wave with high upward pressure followed by a smooth laminar wave) soldering technique should be used. * The longitudinal axis of the package footprint must be parallel to the solder flow. * The package footprint must incorporate solder thieves at the downstream end. During placement and before soldering, the package must be fixed with a droplet of adhesive. The adhesive can be applied by screen printing, pin transfer or syringe dispensing. The package can be soldered after the adhesive is cured. Maximum permissible solder temperature is 260 C, and maximum duration of package immersion in solder is 10 seconds, if cooled to less than 150 C within 6 seconds. Typical dwell time is 4 seconds at 250 C. A mildly-activated flux will eliminate the need for removal of corrosive residues in most applications. REPAIRING SOLDERED JOINTS Fix the component by first soldering two diagonallyopposite end leads. Use only a low voltage soldering iron (less than 24 V) applied to the flat part of the lead. Contact time must be limited to 10 seconds at up to 300 C. When using a dedicated tool, all other leads can be soldered in one operation within 2 to 5 seconds between 270 and 320 C.
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Philips Semiconductors
Product specification
Sound fader control circuit
DEFINITIONS Data sheet status Objective specification Preliminary specification Product specification Limiting values
TEA6300 TEA6300T
This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications.
Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Where application information is given, it is advisory and does not form part of the specification. LIFE SUPPORT APPLICATIONS These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resulting from such improper use or sale.
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